CSCI E-93: Application Note 9

Installing and Using ModelSim - Intel Integrated with Quartus
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Installing ModelSim - Intel
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The Starter Edition of ModelSim - Intel can be installed without requiring a
license.  As of 5-April-2023, the newest edition is 20.1.1 and is available
at:

https://www.intel.com/content/www/us/en/software-kit/750666/modelsim-intel-fpgas-standard-edition-software-version-20-1-1.html

Downloads are available for both Linux and Windows.

During the installation process, choose the ModelSim - Intel FPGA Starter
Edition (rather than the ModelSim - Intel FPGA Edition).

Specify EDA tool settings:

1) In Quartus, select Tools -> Options...
2) Select General -> EDA Tool Options
3) Under ModelSim-Altera, navigate to C:\intelFPGA\20.1\modelsim_ase\win32aloem

IMPORTANT: ModelSim-Altera is the last option, NOT THE ONE IN THE MIDDLE which
is ModelSim.

4) Click on OK

Using ModelSim - Intel
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1) Proceed as usual to compile your project in Quartus.  Once your project
   compiles with Full Compilation successful, proceed to the next step.

2) Under Tools, select Run Simulation Tool -> RTL Simulation
   ModelSim - INTEL FPGA STARTER EDITION 2020.1 should have started and opened
   up in a new window.

3) To simulate your design, from the menu bar select
   Simulate -> Start Simulation...

4) To simulate your top-level entity, click on the "+" symbol before "work" and
   click once to select (and highlight) your entity, then click on OK.

5) If you don't see a waveform diagram, right-click over the entity and select
   Add Wave.

6) If all signals are not shown in the waveform diagram, right-click over the
   Architecture in the sim pane and select Add to -> Wave ->
   All items in design.  To remove items from the waveform diagram, click on
   the item and hit the Delete key.

7) Right click on items in the Wave pane to force the value of an item, to
   associate an item with a clock, or to unforce the value of an item.  Also,
   the radix of an item can be changed and other alterations can also be made.

8) To run the simulation, click on the Run icon (looks like a document with an
   arrow pointing down to the right of the document) or on the menu item
   Simulate -> Run -> Run 100 to run the simulation for 100ps (picoseconds).
   The run time duration can be changed in the "run length" box.

9) In the Force Selected Signal dialog window, a forced change can be delayed
   for a specified number of ps (picoseconds) to demonstrate what happens when
   that signal changes state.

Note: For some VHDL syntax, you may need to change Compile -> Compile Options...
to Language Syntax -> Use 1076-2008.